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\pagehead{Registers}

These registers control the basic operation of the Gameduino.
Memory is little-endian, so 16-bit registers have their lower 8 bits at the
lower address in memory.

\begin{tabular}{|c|c|l|p{0.45 \textwidth}|c|c|}
\hline
\textbf{Address} & \textbf{Bytes}   & \textbf{Name} & \textbf{Description} & \textbf{Access} & \textbf{Reset value} \\ \hline
\texttt{0x2800} & 1 & IDENT         & Gameduino identification - always reads as 0x6D                                 & r   & 0x6d \\ \hline
\texttt{0x2801} & 1 & REV           & Hardware revision number.  High 4 bits are major revision, low 4 bits are minor & r   & 0x10 \\ \hline
\texttt{0x2802} & 1 & FRAME         & frame counter, increments at the end of each displayed frame                    & r   & 0 \\ \hline
\texttt{0x2803} & 1 & VBLANK        & set to 1 during the video blanking period                                       & r   & 0 \\ \hline
\texttt{0x2804} & 2 & SCROLL\_X     & Horizontal background scrolling register, 0-511                                 & r/w & 0 \\ \hline
\texttt{0x2806} & 2 & SCROLL\_Y     & Vertical background scrolling register, 0-511                                   & r/w & 0 \\ \hline
\texttt{0x2808} & 1 & JK\_MODE      & Sprite collision class mode enable, 0-1                                         & r/w & 0 \\ \hline
% \texttt{0x2809} & 1 & J1\_RESET     & Coprocessor reset, 1 holds coprocessor in reset                                 & r/w & 1 \\ \hline
\texttt{0x280A} & 1 & SPR\_DISABLE  & sprite control: 0 enable sprite display, 1 disable sprite display               & r/w & 0 \\ \hline
\texttt{0x280B} & 1 & SPR\_PAGE     & sprite page select: 0 display from locations 3000-33FF, 1 from 3400-37FF        & r/w & 0 \\ \hline
\texttt{0x280C} & 1 & IOMODE        & Pin 2 mode: 0=disconnect, 0x46=flash enable, 0x4A=coprocessor control           & r/w & 0 \\ \hline
\texttt{0x280E} & 2 & BG\_COLOR     & Background color                                                                & r/w & 0 \\ \hline
\texttt{0x2810} & 2 & SAMPLE\_L     & Audio left sample value, 16 bit signed -32768 to +32767                         & r/w & 0 \\ \hline
\texttt{0x2812} & 2 & SAMPLE\_R     & Audio right sample value, 16 bit signed -32768 to +32767                        & r/w & 0 \\ \hline
\texttt{0x281E} & 2 & SCREENSHOT\_Y & Screenshot line select 0-299                                                    & r/w & 0 \\ \hline
\texttt{0x2840} & 32 & PALETTE16A   & 16 color sprite A palette                                                       & r/w & 0000 (black) \\ \hline
\texttt{0x2860} & 32 & PALETTE16B   & 16 color sprite B palette                                                       & r/w & 0000 (black) \\ \hline
\texttt{0x2880} & 8 & PALETTE4A     & 4 color sprite A palette                                                        & r/w & 0000 (black) \\ \hline
\texttt{0x2888} & 8 & PALETTE4B     & 4 color sprite B palette                                                        & r/w & 0000 (black) \\ \hline
% \texttt{0x2890} & 48 & COMM         & Coprocessor communication block                                                 & r/w & 0 \\ \hline
\texttt{0x2900} & 256 & COLLISION   & Collision RAM                                                                   & r   & 0 \\ \hline
\texttt{0x2a00} & 256 & VOICES      & Audio voice controls                                                            & r/w & 0 \\ \hline
% \texttt{0x2b00} & 256 & J1\_CODE    & Coprocessor instruction RAM                                                     & r/w & 0 \\ \hline
\texttt{0x2c00} & 800 & SCREENSHOT  & Screenshot line RAM                                                             & r   & 0 \\ \hline

\end{tabular}

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